1. Field of the Invention
The present invention generally relates to a time-to-digital converter.
2. Description of Related Art
Persons of ordinary skill in the art understand terms and basic concepts related to microelectronics that are used in this disclosure, such as “voltage,” “signal,” “logical signal,” “clock,” “phase,” “period,” “trip point,” “resistor,” “capacitor,” “transistor,” “MOS (metal-oxide semiconductor),” “PMOS (p-channel metal oxide semiconductor),” “NMOS (n-channel metal oxide semiconductor),” “source,” “gate,” “drain,” “rectifier,” “half-wave rectifier,” “full-wave rectifier,” and “analog-to-digital converter.” Terms and basic concepts like these are apparent to those of ordinary skill in the art and thus will not be explained in detail here.
Through this disclosure, a logical signal is a signal of two states: “high” and “low,” which can also be re-phrased as “1” and “0.” For brevity, a logical signal in the “high” (“low”) state is simply stated as the logical signal is “high” (“low”), or alternatively, the logical signal is “1” (“0”). Also, for brevity, quotation marks may be omitted and the immediately above is simply stated as the logical signal is high (low), or alternatively, the logical signal is 1 (0), with the understanding that the statement is made in the context of describing a state of the logical signal.
A logical signal is said to be asserted when it is high. A logical signal is said to be de-asserted when it is low.
A clock signal is a periodic logical signal of a period. For brevity, hereafter, “clock signal” may be simply referred to as “clock.”
A time-to-digital converter receives a first clock and a second clock and outputs a digital code representing a timing difference between the first clock and the second clock. Time-to-digital converters are well known in the prior art and thus not described in detail here.
A self-calibrating multi-phase clock circuit disclosed in a co-pending application titled “Self-Calibrating Multi-Phase Clock Circuit and Method Thereof” uses a time-to-digital converter to perform calibration on a multi-phase clock. Generally, calibration will not be very accurate unless the time-to-digital converter has a high resolution. Besides, if the multi-phase clock is of a high frequency, the time-to-digital converter needs to be able to resolve a timing of a high-frequency clock. It is very difficult to design a time-to-digital converter capable of resolving a timing of a high frequency clock with a high resolution. For instance, it is very difficult to resolve a timing for a multi-phase 25 GHz clock with a resolution as fine as 1 ps.
What is desired is a time-to-digital converter capable of resolving a timing of a high frequency clock with a high resolution.